Master Run Page

Environment:

Time: 02:43:50
Date: Nov 21 2009

Simulation:

Cactus Simulation
WaveDemo.par
Iteration: 3470
Physical time: 44.49

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Parameters
Groups and Variables

PUGH:

cacheline_mult
enable_all_storage
ghost_size
ghost_size_x
ghost_size_y
ghost_size_z
global_nsize
global_nx
global_ny
global_nz
info
initialize_memory
local_nsize
local_nx
local_ny
local_nz
local_size_includes_ghosts
overloadabort
overloadarraygroupsizeb
overloadbarrier
overloaddisablegroupcomm
overloaddisablegroupstorage
overloadenablegroupcomm
overloadenablegroupstorage
overloadevolve
overloadexit
overloadgroupdynamicdata
overloadmyproc
overloadnprocs
overloadparallelinit
overloadquerygroupstorageb
overloadsyncgroup
padding_active
padding_address_spacing
padding_cacheline_bits
padding_size
partition
partition_1d_x
partition_2d_x
partition_2d_y
partition_3d_x
partition_3d_y
partition_3d_z
periodic
periodic_x
periodic_y
periodic_z
processor_topology
processor_topology_1d_x
processor_topology_2d_x
processor_topology_2d_y
processor_topology_3d_x
processor_topology_3d_y
processor_topology_3d_z
storage_report_every
storage_verbose
timer_output

PUGH: padding_cacheline_bits

Return to all parameters for this thorn.
Name: padding_cacheline_bits
Thorn: PUGH
Implementation: Driver
Current value: 12
Description:: Number of bits which have to be unique to pad properly for cache lines
Default::: 12
Steerable: Never
Type: Integer
Scope:Private
Range:
1:*
Any positive number
Times Set: 0
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